Hey, I have decided to make these devlogs every 5-6 hours of work so i don’t lose my sanity, hopefully that’s ok? anyways……………right, the devlog
First, i implemented this 8 bit load instruction i thought was alr implemented
ld r8, n8 -> literally just copies the next byte in the ROM file to the register r8
pretty boring but……
Big news: We’re now getting into 16 bit instructions!!
there are not many of them in the GB but they proved to be a bit more complicated
I started by just trying to get a mental model of how 16 bit operands work in the GB at first I was just trying to do a one to one recreation of my “revolutionary” R8 enum but that proved to be very stupid because the r16 operand was wildly different from the r8 operand
basically
there are 3 types of the r16 operand:
- r16 -> is either BC, DE, HL or SP
- r16mem -> is either BC, DE, HL+ or HL- (+- just means you increment or decrement afterwords)
- r16stk -> is either BC, DE, HL or AF (i have no clue what this does as of now, but is used in the pop and push instructions)
i tried a lot of different things to implement this behavior nicely and cleanly.
I eventually figured it out after taking a break, I made the R16 enum for handling r16 operands, hopefully the cleanest piece of code i have ever written (maybe).
I implemented 3 instructions (12 opcodes overall) using it:
- ld r16 n16 -> copies the next 16 bits in the ROM file (little endian) to r16
- ld [r16mem] a -> copies the value in the A register to the memory address in r16mem
- ld a [r16mem] -> same as above but in reverse
and ofc wrote some tests for them.
Now when running a tetris ROM file only 6 instructions from that beginning section are unsupported, ofc it still crashes, most likely trying to read operands as instructions due to LD [a16], SP not being supported
Next step is probably implementing the rest of the 16 bit load instructions as well as the push and pop instructions.
Until then, Goodbye 🫡